Field of the Invention
Embodiments of the present invention relate generally to virtual memory, and, more specifically, to a fault buffer for resolving page faults in a unified virtual memory system.
Description of the Related Art
Most modern computer systems typically implement some type of virtual memory architecture. Among other things, the virtual memory architecture enables instructions to access memory using virtual memory addresses, rather than physical memory addresses. By providing this virtual memory layer between physical memory and application software, user-level software is shielded from the details of physical memory management, which is left to a dedicated memory management system.
A typical computer system that implements a virtual memory architecture includes a central processing unit (CPU) and one or more parallel processing units (GPUs). In operation, a software process executing on either a CPU or a GPU may request data via a virtual memory address. In many traditional architectures, the virtual memory systems that handle requests for data via virtual memory addresses for a CPU and a GPU are independent. More specifically, a separate CPU memory management system and a separate GPU memory management system handle requests for data from the CPU and GPU, respectively.
There are several drawbacks associated with such independent memory management systems. For example, each independent memory management system does not necessarily have knowledge of the contents of the memory units associated with the other memory management system. Thus, the memory management systems cannot necessarily cooperate to provide certain efficiencies, such as determining where data should be stored for improved access latency. Additionally, as the memory management systems are independent, pointers for one such system are not necessarily compatible with the other system. Thus, an application programmer must keep track of two different types of pointers.
As the foregoing illustrates, what is needed in the art is a more efficient approach to managing virtual memory in a system with heterogeneous processors, such as a CPU and a GPU.